1. Field of the Invention
The present invention relates to a semiconductor integrated circuit device, and more particularly to a semiconductor integrated circuit device such as a large scale memory device which has an internal voltage controlling circuit for lowering an externally supplied voltage to produce an internal power source voltage.
2. Description of the Related Art
In recent years the degree of integration of semiconductor integrated circuit devices has advanced remarkably and, along with this, the transistor which is used as an active element therein has been dramatically miniaturized. The higher degree of integration of circuits is accompanied by problems such as the occurrence of hot carriers caused by an increase in internal electric fields and the decrease in the reliability of insulation oxide films and, in order to solve these problems, it is usual to lower the power source voltage. Since the externally supplied voltage is normally 5 V, a means employed for internally lowering the external power source voltage is to internally provide an internal voltage controlling circuit in a semiconductor integrated circuit device, whereby the required voltage, for example, 3 V is obtained.
A conventional semiconductor integrated circuit device of the kind explained above is equipped with an internal voltage controlling circuit 10 which includes, as shown in FIG. 1A, a differential circuit 2 constituted by a plurality of transistors T11-T14 for detecting the difference between a reference voltage V.sub.REF and an internal voltage V.sub.INT, an output P-channel MOS transistor T1, and a transistor T2 as the current source for the differential circuit 2.
More specifically, the differential circuit 2 is a known circuit and includes the two N-channel MOS transistors T11 and T12 which are differentially connected and receive at their gates the internal voltage V.sub.INT and the reference voltage V.sub.REF, respectively, and the two P-channel MOS transistors T13 and T14 which form a current-mirror circuit and function as load elements for the transistors T11 and T12, respectively.
Next, the operation of the conventional semiconductor integrated circuit device described above is explained.
In the internal voltage controlling circuit 10, when the internal power source voltage V.sub.INT applied to the gate of the transistor T11 becomes higher than the reference voltage V.sub.REF applied to the gate of the transistor T12 of the differential circuit 2, the drain current of the transistor T11 increases and the drain current of the transistor T12 decreases. On the other hand, since the transistors T13 and T14 functioning as the load elements for the transistors T11 and T12 constitute the current-mirror circuit, the transistor T14 operates so as to hold its drain current to the current value of the transistor T13 at the current input side and, as a result, the output voltage at the drain side of this transistor T14 rises. Accordingly, the gate potential of the output transistor T1 also rises, which means that, since the potential drops with respect to the source side of the transistor T1, the drain potential seen from the source side of the transistor T1 is caused to rise thereby lowering the output current. That is, the output voltage is lowered with reference to ground.
On the contrary, it can be readily understood that, when the internal power source voltage V.sub.INT becomes lower than the reference voltage V.sub.REF, the output voltage rises due to the operation being the opposite of that explained above.
FIG. 1B shows a second example of the conventional semiconductor integrated circuit device having an internal voltage controlling circuit 20 in which, at the output side of the differential circuit 2, there is further provided a P-channel MOS transistor T3 connected to an external power source VC and in which the activating signal CA is applied to the gate of the transistor T3 and the gate of the transistor T2 which acts as the current source for the differential circuit 2.
In the internal voltage controlling circuit 20 of the second example of the conventional semiconductor integrated circuit device, only the transistor T3 is activated where the current supply capability may be small as in a stand-by state. The transistor T3 operates as a voltage drop circuit in which power consumption is small. Under normal operation, the overall circuit is activated by having the transistor T2 activated while the transistor T3 inactivated, so that a large current supply capability may be obtained.
FIG. 2 is a graph showing output voltage characteristics of the internal power source voltage V.sub.INT with regard to the external power source voltage VC in the conventional semiconductor integrated circuit device. As shown in the graph, when the external power source voltage VC becomes is high or higher than the reference voltage V.sub.REF, the internal power source voltage V.sub.INT becomes a constant voltage equal to the reference voltage V.sub.REF.
A problem in the conventional integrated circuit device explained above is that, when the external power source voltage drops to the neighborhood of the internal power source voltage, a voltage across the drain/source the output transistor of the internal voltage controlling circuit becomes small and, as a consequence, the current supply capability becomes poor resulting in a marked drop in the internal power source voltage and in deterioration of circuit performance. These are problems in the conventional semiconductor integrated circuit device, which are to be solved by the present invention.